Program for: September 3, 2003
September 4, 2003
September 5, 2003
| P-1 | "A Novel Sub-20nm Depletion-Mode Double-Gate (DMDG) FET" T. Krishnamohan, Z. Krivokapic*, K. Saraswat, Stanford University, Stanford, CA, *AMD, Sunnyvale, CA |
| P-2 | "Accurate Four-Terminal RF MOSFET Model Accounting for the Short-Channel Effect in the Source-to-Drain Capacitance" M. Je, H. Shin, Korea Advanced Institute of Science and Technology, Daejeon, Korea |
| P-3 | "Optimization of LGate for ggNMOS ESD Protection Devices Fabricated on Bulk- and SOI- Substrates, using Process and Device Simulation" A. Icaza Deckelmann, G. Wachutka, Munich University of Technology, Munchen, Germany |
| P-4 | "Junction Engineering and Modeling for Advanced CMOS Technologies" C. C. Wang, T. Y. Huang, C. H. Wang, R. Duffy*, N. Cowern**, P. Griffin***, C. H. Diaz, Taiwan Semiconductor Manufacturing Company, Taiwan, R.O.C. *Philips Research Leuven, Leuven, Belgium, **University of Surrey, Surrey, United Kingdom, ***Stanford University, Stanford, CA |
| P-5 | "A Multistage Smoothing Algorithm for Coupling Cellular and Polygonal Datastructures" A. Hossinger, J. Cervenka, S. Selberherr, TU Vienna, Vienna, Austria |
| P-6 | "A Numerically Efficient Method for the Hydrodynamic Density-Gradient Model" S. Jin, Y. J. Park, H. S. Min, Seoul National University, Seoul, Korea |
| P-7 | "Simulation of 2D Quantum Transport in Utrashort DG-MOSFETs: A Fast Algorithm Using Subbands" N. B. Abdallah, E. Polizzi, M. Mouis*, F. Mehats, Universite Paul Sabatier, Toulouse, France, *CNRS, Grenoble, France |
| P-8 | "Mobility Modeling in Presence of Quantum Effects" K. Dragosits, V. Palankovski, S. Selberherr, TU Vienna, Vienna, Austria |
| P-9 | "Resonance Quantum Switch: Search of Working Parameters" N. T. Bagraev, B. S. Pavlov*, A. M. Yafyasov**, A. F. Ioffe Physico-Technicak Institute, St. Petersburg, Russia, *University of Auckland, Auckland, New Zealand, **St. Petersburg State University, St. Petersburg, Russia |
| P-10 | "Quantum Corrected Boltzmann Transport Model for Tunneling Effects" B. Wu, T-W. Tang, University of Massachusetts, Amherst, MA |
| P-11 | "Oxide Breakdown Model and its Impact on SRAM Cell Functionality" R. Rodriquez, R. Joshi*, J. Stathis*, C. Chuang*, Electronica Universitat Autonoma de Barcelona, Bellaterra, Spain, *IBM Research Division, Yorktown Heights, NY |
| P-12 | "An Investigation of the Electron Tunneling Gate Leakage Current through Ultrathin Oxides/Gate Stacks at Inversion Conditions" B. Govoreanu*, P. Blomme*, K. Henson, J. Van Houdt, K. de Meyer*, IMEC Leuven, Leuven, Belgium, *KU Leuven, Leuven, Belgium |
| P-13 | "Effects of Gate-to-Body Tunneling Current on PD/SOI CMOS Latches" C. T. Chuang, R. Puri, IBM T.J. Watson Research Center, Yorktown Heights, NY |
| P-14 | "Modeling Gate Leakage in InAs/AlSb HEMTs" M. Ancona, J. Boos, N. Papanicolaou, W. Chang, B. Bennett, D. Park, Naval Research Laboratory, Washington DC |
| P-15 | "Simulation of Nanofloating Gate Memory with High-k Stacked Dielectrics" B. Govoreanu*, P. Blomme*, J. Van Houdt, K. de Meyer*, IMEC Leuven, Leuven, Belgium, *KU Leuven, Leuven, Belgium |
| P-16 | "Developing the Structure of a Cu CMP Model" J. Seok, C. P. Sukam, L. Borucki, A. Jindal, J. A. Tichy, R. J. Gutmann, T. S. Cale, Rensselaer Polytechnic Institute, Troy, NY, *Texas Instruments Inc., Dallas, TX |
| P-17 | "Integrated Multiscale, Multistep Process Simulation" Y. H. Im, M. O. Bloomfield, J. Seok, C. P. Sukam, J. A. Tichy, T. S. Cale, Rensselaer Polytechnic Institute, Troy, NY |
| P-18 | "Coupled Modeling of Time-Dependent Full-Chip Heating and Quantum Non-Isothermal Device Operation" A. Akturk, N. Goldsman, G. Metze, University of Maryland, College Park, MD |
| P-19 | "A New Method for Simulation of On-Chip Interconnects and Substrate Currents with 3D Alternating-Direction-Implicit (ADI) Maxwell Equation Solver" X. Shao, N. Goldsman*, O. Ramahi*, P. N. Guzdar*, NASA, Greenbelt, MD, *University of Maryland, College Park, MD |
| P-20 | "Analysis and Improvements of High Frequency Substrate Losses for RF MOSFETs" J. Ankarcrona, K. Eklund, L. Vestling, J. Olsson, Uppsala University, Uppsala, Sweden |
| P-21 | "Substrate Resistance Extraction Using a Multi-domain Surface Integral Formulation" X. Hu, A. Vithayathil, J. White, MIT, Cambridge, MA |